This invention relates to a semiconductor device, and more particularly to a transistor circuit which is formed into a semiconductor integrated circuit device (IC).
When an N-P-N transistor is driven to the saturation region, the phenomenon of injection of holes from the base to the collector of the transistor takes place. Especially, where the N-P-N transistor is formed in an IC, the hole current becomes the substrate current and raises the substrate potential. This is disadvantageous in causing the parasitic effect in the adjacent N-type epitaxial island etc. In particular, when an N-P-N transistor for power as included in an IC for power is driven to an extremely deep saturation region, respective elements within the IC are affected by the saturation of the N-P-N transistor for power through a semiconductor substrate which is their common region.
On the other hand, when a transistor is driven to an extremely deep saturation region, the switching speed of the transistor lowers under the influence of minority carriers injected from the collector to the base.
There has hitherto been proposed a method for preventing a transistor from being saturated. In the method, a clamping diode (for example, metal-semiconductor contact Schottky barrier diode) which exhibits a forward voltage V.sub.F smaller in magnitude than the base-collector forward voltage V.sub.BC of the transistor to have its saturation prevented is connected in the forward direction between the base and collector of the transistor.
According to such known method, when an excess current flows into the base of the transistor and the transistor is going to be saturated, the excess current flows to the collector of the transistor through the clamping diode having the forward voltage V.sub.F of the smaller magnitude, with the result that the excess current is prevented from flowing into the base of the transistor. Therefore, the saturation of the transistor is preventable eventually.
On the other hand, with the known method, the collector-emitter voltage V.sub.CE of the transistor at the conduction of the clamping diode is given as the difference between the base-emitter voltage V.sub.BE of the transistor and the smaller forward voltage V.sub.F of the clamping diode, as indicated by the following equation: EQU V.sub.CE = V.sub.BE - V.sub.F
since the base-emitter voltage V.sub.BE of the transistor is approximately 0.7- 0.75 V and the forward voltage V.sub.F of the metal-semiconductor contact Schottky barrier diode for clamp is approximately 0.4- 0.45 V, the collector-emitter voltage V.sub.CE becomes approximately 0.3- 0.35 V. This value is greater than the collector-emitter saturation voltage V.sub.CE(sat) (approximately 0.2 V) of the transistor which is driven to the saturation region.
In most transistor circuits, however, it is required that, when a large signal current flows into the base of a transistor and the transistor is driven into the conductive state, the collector-emitter voltage V.sub.CE of the transistor will become a sufficiently small value.
Therefore, the known expedient for the prevention of the saturation of the transistor as employs the clamping diode involves the disadvantage that the required property of such transistor circuits is not satisfied.